1 standard products ut54acs02/ut54acts02 quadruple 2-input nor gates datasheet november, 2010 www.aeroflex.com/logic features ? 1.2 cmos - latchup immune ? high speed ? low power consumption ? single 5 volt supply ? available qml q or v processes ? flexible package - 14-pin dip - 14-lead flatpack ? ut54acs02 - smd 5962-96514 ? ut54acts02 - smd 5962-96515 description the ut54acs02 and the ut54acts02 are quadruple, two- input nor gates. the circuits perform the boolean functions y = a + b or y = a ? b in positive logic. the devices are characterized over full military temperature range of -55 c to +125 c. function table logic symbol pinouts 14-pin dip top view 14-lead flatpack top view logic diagram inputs output a b y h x l x h l l l h y1 (1) (4) y2 y3 (10) (13) y4 (2) a1 (3) b1 (5) a2 (6) b2 (8) a3 (9) b3 (11) a4 (12) b4 note: 1. logic symbol in accordance with ansi/ieee standard 91-1984 and iec publication 617-12. 1 1 2 3 4 5 7 6 14 13 12 11 10 8 9 y1 a1 b1 y2 a2 b2 v ss v dd y4 b4 a4 y3 b3 a3 1 2 3 4 5 7 6 14 13 12 11 10 8 9 y1 a1 b1 y2 a2 b2 v ss v dd y4 b4 a4 y3 b3 a3 b4 a4 y4 b3 a3 y3 a1 b1 y1 a2 b2 y2
2 operational environment 1 notes: 1. logic will not latchup during radiation exposu re within the limits defined in the table. 2. device storage elements are immune to seu affects. absolute maximum ratings note: 1. stresses outside the listed absolute maxi mum ratings may cause permanent damage to the device. this is a stress rating only, functional operation of the device at these or any other conditions beyond limits in dicated in the operational s ections is not reco mmended. exposure to absolute maxi mum rating conditions for extended periods may affect device reliability. recommended operating conditions parameter limit units total dose 1.0e6 rads(si) seu threshold 2 80 mev-cm 2 /mg sel threshold 120 mev-cm 2 /mg neutron fluence 1.0e14 n/cm 2 symbol parameter limit units v dd supply voltage -0.3 to 7.0 v v i/o voltage any pin -.3 to v dd +.3 v t stg storage temperature range -65 to +150 c t j maximum junction temperature +175 c t ls lead temperature (soldering 5 seconds) +300 c jc thermal resistance junction to case 20 c/w i i dc input current 10 ma p d maximum power dissipation 1 w symbol parameter limit units v dd supply voltage 4.5 to 5.5 v v in input voltage any pin 0 to v dd v t c temperature range -55 to + 125 c
3 dc electrical characteristics 7 (v dd = 5.0v 10%; v ss = 0v 6 , -55 c < t c < +125 c); unless otherwise noted, tc is per the temperature range ordered. symbol parameter condition min max unit v il low-level input voltage 1 acts acs 0.8 .3v dd v v ih high-level input voltage 1 acts acs .5v dd .7v dd v i in input leakage current acts/acs v in = v dd or v ss -1 1 a v ol low-level output voltage 3 acts acs i ol = 8.0ma i ol = 100 a 0.40 0.25 v v oh high-level output voltage 3 acts acs i oh = -8.0ma i oh = -100 a .7v dd v dd - 0.25 v i os short-circuit output current 2 ,4 acts/acs v o = v dd and v ss -200 200 ma i ol output current 10 (sink) v in = v dd or v ss v ol = 0.4v 8 ma i oh output current 10 (source) v in = v dd or v ss v oh = v dd - 0.4v -8 ma p total power dissipation 2, 8, 9 c l = 50pf 1.8 mw/ mhz i ddq quiescent supply current v dd = 5.5v 10 a i ddq quiescent supply current delta acts for input under test v in = v dd - 2.1v for all other inputs v in = v dd or v ss v dd = 5.5v 1.6 ma c in input capacitance 5 ? = 1mhz @ 0v 15 pf c out output capacitance 5 ? = 1mhz @ 0v 15 pf
4 notes: 1. functional tests are conducted in accordance with mil-std-883 with th e following input test conditions: v ih = v ih (min) + 20%, - 0%; v il = v il (max) + 0%, - 50%, as specified herein, for ttl, cmos, or schmitt compatible inputs. devices may be tested using any input voltage within the above specified range, but are guaranteed to v ih (min) and v il (max). 2. supplied as a design limit but not guaranteed or tested. 3. per mil-prf-38535, for current density 5.0e5 amps/cm 2 , the maximum product of load cap acitance (per output buffer) times frequency should not exceed 3,765 pf/mhz. 4. not more than one output may be shorted at a time for maximum duration of one second. 5. capacitance measured for initial qualifica tion and when design changes may affect th e value. capacitance is measured between the designated terminal and v ss at frequency of 1mhz and a signal amplitude of 50 mv rms maximum. 6. maximum allowable relative shift equals 50mv. 7. all specifications valid for radiation dose 1e6 rads(si). 8. power does not include power contri bution of any ttl output sink current. 9. power dissipation specifi ed per switching output. 10. this value is guaranteed based on characterization data, but not tested.
5 ac electrical characteristics 2 (v dd = 5.0v 10%; v ss = 0v 1 , -55 c < t c < +125 c); unless otherwise noted, tc is per the temperature range ordered. notes: 1. maximum allowable relative shift equals 50mv. 2. all specifications valid for radiation dose 1e6 rads(si). symbol parameter minimum maximum unit t phl input to yn 1 13 ns t plh input to yn 1 11 ns
6 packaging side-brazed packages
7 flatpack packages ut54acs00/ut54acts00: ordering information
8 ut54acs02/ut54acts02: smd 5962 ***** ** * * * * lead finish: (notes 1 & 2) a = solder c = gold x = optional package type: x = 14-lead ceramic botto m-brazed dual-in-line flatpack c = 14-lead ceramic side-brazed dip class designator: q = qml class q v = qml class v device type: 01 drawing number : 96514 = ut54acs02 96515 = ut54acts02 total dose: (notes 3 & 4) r = 1e5 rads(si) f = 3e5 rads(si) g = 5e5 rads(si) h = 1e6 rads(si) notes: 1. lead finish (a,c, or x) must be specified. 2. if an ?x? is specified when ordering, pa rt marking will match the lead finish and w ill be either ?a? (solder) or ?c? (gold). 3. total dose radiation must be specified when ordering. qml q and qml v not available without radiation hardening. for protot ype inquiries, contact factory. 4. device type 02 is only offered with a tid tolerance guarantee of 3e5 rads(si) or 1e6 rads(si) and is tested in accordance wi th mil-std-883 test method 1019 condition a and section 3.11.2 . device type 03 is only offered with a tid tolerance guarantee of 1e5 rads(si), 3e5 rads(si) , and 5e5 rads(si), and is tested in accordance with mil-std-883 test method 1019 condition a.
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